OSVP Subsystem Xilinx FPGA IP

The Omnitek Scalable Video Processor is a highly configurable set of IP blocks and optional features that together provide a powerful range of tools for multi-video format conversion and image enhancement for video formats up to 60Hz Ultra HD, with 120Hz Ultra HD output as a further option. For ease of implementation and to make best use of system resources, the principal IP blocks are packaged as a single OSVP core offering up to 8 video channels that you can individually configure to carry out the precise range of actions needed to deliver the transformations you require.

Video Support

  • Interlaced, progressive or segmented frame (PsF) video input formats up to 4096 x 2160 at 60Hz (8096 x 4800 at 120fps road mapped)
  • Interlaced or progressive output Video output formats up to 4096 x 2160 at 120fps (8096 x 4800 at 120fps road mapped)
  • YUV and RGB colour in 4:2:0, 4:2:2 or 4:4:4 format
  • 8, 10 or 12-bit colour depths
  • Up to 8 video processing paths, each individually configured for video standard and processing

Full 12-bit YUV or RGB 4:4:4 processing

  • Up/Down/Cross conversion between any supported standards
  • Asynchronous input and output timing with frame synchronization (when changing frame rate)
  • Chroma re-sampling
  • Full 6-axis YUV/RGB colour correction, brightness and saturation level control, and hue rotation with Colour primary mapping
  • Motion- and/or Edge-adaptive de-interlacing with best-in-class low-angle handling
  • 3:2 and 2:2 film cadence detection and processing, including handling of mixed cadence such as interlaced video over 3:2 film
  • Noise reduction
  • Crop and resize with Super-Resolution image enhancement
  • Alpha blending of multiple video sources

Xilinx Vivado IPI Design Environment

  • Resource use and signal timing optimised through packaging the main processing blocks as single configurable OSVP core
  • AXI4-Stream interfaces for video; AXI4-MM to SDRAM controller; AXI4-Lite to control registers
  • Omnitek FPGA Software Interface Framework for easy prototyping, with drivers for Linux, Xilinx Kernel and Windows that present identical APIs
  • All blocks optimised for Xilinx FPGA technology

OSVP Demonstration

OSVP Latency Demonstration

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