Arria II Audio Video Development Kit


Arria II GX Development Kit host board
and Transceiver SDI HSMC card

The OmniTek Arria II GX Audio Video Development Kit combines Altera’s proven FPGA-based development hardware and associated IP with OmniTek’s expertise in video algorithm IP and PCI Express interface design to offer a PCIe Gen1-based image processing environment centred on Altera’s Arria II FPGA family.

Comprises
  • Altera Arria II GX Audio Video Development Kit – which includes the main board shown here
  • Terasic Technologies SDI (Serial Digital Interface) Transceiver High-Speed Mezzanine Card (HSMC) – also shown to the right
  • Altera Arria II CD ROM
  • Altera Complete Design Suite DVD – which includes:
    • Quartus II Software Development Kit Edition (1-year licence)
    • Nios II Embedded Design Suite
    • OpenCore Plus access to MegaCore® IP Library, including the Altera Video and Image Processing Suite of IP cores
  • Altera Triple-Speed (3G, HD and SD) SDI IP
  • OpenCore Plus access to OmniTek's Multi-Channel Streaming DMA Controller IP (complete with Windows drivers)
  • Compiled SDI to PCIe Bridge Video Streaming Reference Design offering 2x video input and 2x video output
  • Documentation, design examples and schematics
  • Future extension to include OmniTek Audio and SMPTE 2020 (Dolby E Metadata) embed/de-embed IP

The Altera Triple-Speed SDI IP, VIP Video Image Processing IP and Nios processor and the OmniTek DMA Controller IP and Reference Design are initially provided encrypted and tethered to the Altera Arria II development environment. Upon evidence of purchase of the A/V Dev Kit to OmniTek, however, customers will be entitled to a discounted production license to all the IP integrated in the bundle, i.e the Altera SDI, VIP & Nios and the OmniTek multi-channel streaming DMA Controller. A further upgrade to full source code versions of the OmniTek IP and Reference Design is also available from OmniTek.

Features
  • Host board based on Arria II GX EP2AGX125EF35 FPGA, key features of which are its PCIe Gen1 Hard IP block and Nios II embedded processor
  • Max® II EPM2210F256 CPLD also on host board
  • One HSMC expansion port and one 1GBit Ethernet port on host board
  • Video/Audio interfaces as follows:
    • Two SDI inputs and outputs for Triple-rate SDI on HSMC
    • Two AES inputs and outputs on HSMC
  • Memory devices as follows included on host board:
    • 128MB 16bit DDR3
    • 1GB 64bit DDR2 SODIMM
    • 2MB SSRAM
    • 64MB Flash memories
  • USB and Ethernet cables
  • AC adapter power supply
  • RoHS compliance
Multi-Channel Streaming DMA Controller

OmniTek’s Multi-Channel Streaming DMA Controller is designed for implementation in Altera FPGAs such as the Arria II that include a PCIe Hard IP block. It supports data transfer over either a PCIe Gen1 (as supported by Arria II FPGAs) or a PCIe Gen2 bus (as supported for example by the Altera Stratix IV FPGA family). The controller offers both memory-based ‘MDMA’ for handling transfers to and from addressed memory such as on-board SRAM and SDRAM, and FIFO-based ‘FDMA’ for streaming applications. The FDMA channels are optimised to only use FPGA-embedded memory blocks to transfer video.

  • Configurable for 1, 2 and 4-lane PCIe Gen1 buses
  • Supports 32-bit addressing (with future extension to 64-bit)
  • Configurable number of 32, 64 or 128bit MDMA channels
  • Configurable number of 32, 64 or 128bit FDMA streaming channels
  • Controller block, PCIe translation block and wrappers, optionally available as source code in either Verilog or VHDL
  • Controller IP includes drivers and API for Window XP™ and Vista™ (optionally available as C source code)
High Bandwidth Efficiency Example Applications

A major feature of the DMA Controller is its high level of PCIe bus bandwidth efficiency, which it achieves through:

  1. Support for multiple outstanding read requests. This
    minimises the effects of PCIe latency.
  2. Pre-fetching of the next descriptor in Scatter-Gather mode to ensure a smooth transition from one descriptor to the next. This is essential when working with streaming video to ensure that buffers do not overflow.
  3. Optimisation of the arbiter controlling access to the PCIe bus for back-to-back packing of TLP packets while processing multiple channels.
  • Data servers
  • Video disk recorders
  • Video capture cards

The DMA Controller may be provided as source code in either Verilog or VHDL. Its interfaces are Altera Avalon-compatible to allow easy integration with other Altera OpenCore components. Users therefore have the choice of either instantiating the DMA Controller directly in their own top-level design or both configuring it and linking it with other Altera OpenCore components. The top-level module of the Reference Design may also be used as the basis for similar designs.

Video-Streaming Reference Design

Supplied with the DMA Controller is an example video-streaming design.

This reference design comprises firmware for implementation on Altera’s Arria II GX FPGA Development Kit together with an example application written in C++.

The application demonstrates the ability of the DMA controller to read two input video streams at the same time as writing two output video streams.

It can work with video in any of the following formats*:

  • PAL, NTSC
  • 1080i (at 50/59.94/60 Hz)
  • 720p (at 50/59.94/60 Hz)
  • 3G A 1080p (at 50/59.94/60 Hz)

The application also demonstrates the use of the Windows driver and API supplied with the DMA Controller.

The various elements of the Reference Design are also available in source form (alongside the other OmniTek IP).

* Note: The number of streams that can be read or written may be limited by the bandwidth of the PCIe bus. In particular, two 3G A streams will require a 4-lane implementation.

HSMC Card

The HSMC card included in the the OmniTek Arria II GX Audio Video Development Kit provides a serial digital interface (SDI) transceiver capable of handling both triple-speed SDI video transmissions and AES audio transmissions. It includes:

  • Two triple-speed (3G/HD/SD) SDI inputs and outputs
  • Two AES inputs and outputs
  • SDI clean-up PLL and AES PLL
Resource Use Bandwidth Requirements

The following summarises the bandwidth needed by the DMA Controller design to transfer two 1080p60 video streams.

To PC:

  • 1080*1920*2*60*2*8 = 3.98 GBits/s
    plus: 0.83 GBits/s to handle read requests
    and: 0.1 Gbits/s to handle scatter-gather
    i.e. total of 4.9 Gbits/s

From PC:

  • 1080*1920*2*60*2*(32/3) = 5.3 GBits/s
    plus: 0.1 Gbits/s to handle scatter-gather
    i.e. total of 5.4 Gbits/s

OmniTek is an Altera Certified Design Center

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